PDF of this tutorialPreliminary findings derived from simulation and precursory measurements and presented at DesignCon 1999 in Signal Integrity Characterization of Printed Circuit Board Parameters proved to be false after a more detailed study.1 Original results indicated a considerable improvement in broadside-coupled over edge-coupled lines, even in as narrow as 8-mil lines. New test boards and additional TDT and VNA measurements, however, show that there is no marked improvement between the two topologies. In the TDT plot shown in Figure 1, both cases have the same linewidth, spacings, and dielectric thicknesses to yield 100-Ohm nominal impedance. Figure 1 merely demonstrates the insufficient difference between the two topologies. Comparable transmitted data plots in both different materials and different line widths show similar results.
Figure 1. Comparison of Broadside versus Edge-Coupled TDT for FR–4, 8-mil, 100-Ohm, 1-m Traces
Layering multiple waveforms yields graphs that are difficult to read. Instead of plotting transmitted data against the time axis, the rise times of the transmitted pulses are plotted as individual data points. Risetime specifications of 10 to 50 percent, 20 to 80 percent, and 10 to 90 percent each seem to favor or ignore certain aspects of the losses. Ten- to fifty-percent risetimes are a better indicator of conductive losses, as the dispersive losses from the material are more readily seen in the top portion of the risetime waveform. Similarly, 10- to 90-percent waveforms are a better indicator of dispersive losses, which, on a TDT measurement, mask conductive losses. Risetimes specified from 20 to 80 percent tend to neglect some reflection seen on the transmitted pulse. For this reason, the three risetime results were averaged for each data point. The risetime data can then be plotted against other factors, such as trace length or trace width.
The output of the TDR’s transmitted pulse at the test board was approximately a 35-ps edge (10- to 90-percent risetime). By plotting a very lossy (FR–4), a less lossy (Rogers 4000 series), and a low-lossy (Arlon 25N) material for both broadside-coupled and edge-coupled differential lines against trace length, a comparison between the two topologies can be made.
As expected, more lossy materials show lower performance from broadside lines than do less lossy materials. For example, FR–4 in the broadside configuration shows more loss than does the edge-coupled configuration seen in Figure 2. For Arlon, the broadside lines experience slightly less loss than do the edge-coupled. The Rogers material shows equal losses for broadside-coupled and edge-coupled lines. In all cases, the difference was not significant in the usable line width range.
Figure 2. Comparison of Different Materials at Different Lengths (Broadside versus Edge-Coupled, 8-mil Lines)
In some instances, broadside lines may have some routing advantages over edge-coupled lines. For the most part, however, broadside lines may become a manufacturing and electrical bane. To prove this point, two mock layups with four signal layers were constructed (see Figure 3).
Figure 3. Mock Layup for Differential Comparison
This translated into eight routing layers for broadside-coupled lines. The layups were based on common backplane linewidths and dielectrics and yielded the following results:
- A typical layup for 8-mil lines (12 mil fills both cases) will increase in thickness and therefore aspect ratio by 27 percent.
- Both factors translate into increased cost and decreased manufacturability.
- As more signal layers are added, the effects are compounded.
In addition to manufacturability implications, this increase in board thickness with broadside-coupled lines increases the capacitance of the PTH and increases the length of the stub, both of which have negative electrical effects.
1Patel, Gautam and Katie Rothstein. "Signal Integrity Characterization of Printed Circuit Board Parameters." 1999 High-Performance System Design Conference, DesignCon 1999, page 1.
