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Creating Safe State Machines
3. Creating 'Hard' Encoded 'Safe' State Machines Using the State Diagram Editor
The State Diagram Editor of the HDL Designer Series fully supports creating hard-encoded "safe" state machines as previously described. To achieve this result, the following options need to be set in the State Machine Properties dialog box:

Figure 2: Menu: State Machine Properties > Generation

Figure 3: Menu: State Machine Properties > Encoding > Generation
The Recovery State can be defined as <start_state>, <current_state>, or a specific state. In the generated HDL, this will be the "others" (for VHDL) or "default" (for Verilog) branch of the case statement. The encoding mode for Hard can be Auto or Manual . If Auto is chosen, the width of STATE_TYPE will be calculated by using the least number of bits based on the number of states. If Manual is selected, you must define the value for each state in the State Diagram Editor, and all the values must have the same size.
Figure 4 shows a "hard" manual encoded state machine using the one-hot scheme.

Figure 4: NRZ-to-Manchester Conversion Using the Hard Manual One-Hot Encoding Scheme




